LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 1
LOADMEM
lw r5 r0 5 # 1 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 10
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 2
LOADMEM
lw r6 r0 6 # 2 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 10
r6: -5
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 3
LOADMEM
sub r2 r6 r5 # 3 test sub
CHECKMEM
r0: 0
r1: 0
r2: -15
r3: 0
r4: 0
r5: 10
r6: -5
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 4
DATAMEM # 4
10 # 5
-5 # 6
END

LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 1
LOADMEM
lw r5 r0 5 # 1 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 10
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 2
LOADMEM
lw r6 r0 6 # 2 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 10
r6: -5
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 3
LOADMEM
add r2 r6 r5 # 3 test add
CHECKMEM
r0: 0
r1: 0
r2: 5
r3: 0
r4: 0
r5: 10
r6: -5
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 4
DATAMEM # 4
10 # 5
-5 # 6
END

LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 1
LOADMEM
lw r5 r0 4 # 1 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 10
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 2
LOADMEM
inv r2 r5 # 2 test inv
CHECKMEM
r0: 0
r1: 0
r2: -10
r3: 0
r4: 0
r5: 10
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 3
DATAMEM # 3
10 # 4
END
