LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 1
LOADMEM
lw r5 r0 5 # 1 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: -10
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 2
LOADMEM
sla r6 r5 # 2 test sla
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: -10
r6: -20
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 3
LOADMEM
sra r4 r5 # 3 test sra
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: -5
r5: -10
r6: -20
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 4
DATAMEM # 4
-10 # 5
END

LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 1
LOADMEM
lw r5 r0 5 # 1 test lw
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 1111111111110110
r6: 0
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 2
LOADMEM
sll r6 r5 # 2 test sll
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 1111111111110110
r6: 1111111111101100
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 3
LOADMEM
srl r4 r5 # 3 test srl
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0111111111111011
r5: 1111111111110110
r6: 1111111111101100
r7: 0
r8: 0
r9: 0
r10: 0
r11: 0
r12: 0
r13: 0
r14: 0
r15: 0
pc: 4
DATAMEM # 4
1111111111110110 # (-10) 5
END
