
LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 1
LOADMEM
lw r1 r0 6 # 1 test lw
CHECKMEM
r0: 0
r1: 5
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 2
LOADMEM
lw r2 r1 2 # 2 test lw
CHECKMEM
r0: 0
r1: 5
r2: 5
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 3
LOADMEM
lw r3 r2 3 # 3 test lw
CHECKMEM
r0: 0
r1: 5
r2: 5
r3: 10
r4: 0
r5: 0
r6: 0
r7: 0
pc: 4
LOADMEM
lw r1 r1 3 # 4 test lw
CHECKMEM
r0: 0
r1: 10
r2: 5
r3: 10
r4: 0
r5: 0
r6: 0
r7: 0
pc: 5
DATAMEM # 5
5 # 6
5 # 7
10 # 8
END

LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 1
LOADMEM
lw r1 r0 3 # 1 test lw
CHECKMEM
r0: 0
r1: 000000000111
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 2
DATAMEM # 2
000000000111 # (=7) 3
END

LOADMEM
zero r0 # 0 instruction that is actually used as immediate...
CHECKMEM
r0: 0
r1: 0
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 1
LOADMEM
lw r1 r0 7 # 1 test lw
CHECKMEM
r0: 0
r1: 000000000111
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 2
LOADMEM
sw r1 r1 1 # 2 test sw
CHECKMEM
r0: 0
r1: 000000000111
r2: 0
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 3
LOADMEM
lw r2 r1 1 # 3 test lw
CHECKMEM
r0: 0
r1: 000000000111
r2: 000000000111
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 4
LOADMEM
sw r2 r1 3 # 4 test sw
CHECKMEM
r0: 0
r1: 000000000111
r2: 000000000111
r3: 0
r4: 0
r5: 0
r6: 0
r7: 0
pc: 5
LOADMEM
lw r3 r1 3 # 5 test lw
CHECKMEM
r0: 0
r1: 000000000111
r2: 000000000111
r3: 000000000111
r4: 0
r5: 0
r6: 0
r7: 0
pc: 6
DATAMEM # 6
000000000111 # (7) 7
END
