Refactor: rename dsiState

simulator/devs_models/dsi.py

@@ -19,7 +19,7 @@ class DsiPhase(TimedPhaseEnum):
 
 
 @dataclass
-class InputBayState:
+class DsiState:
     delta_t: float = INFINITY
     phase: DsiPhase = DsiPhase.IDLE
     workpiece: Workpiece | None = None
@@ -39,7 +39,7 @@ class DSI(AtomicDEVS):
         self.mqtt_out = self.addOutPort("mqtt_out")
         self.vgr_in = self.addInPort("vgr_in") # input for vgr requesting workpiece
 
-        self.state = InputBayState()
+        self.state = DsiState()
 
     def change_phase(self, new_phase: DsiPhase):
         """ Wrapper for changing the phase and time associated with it, helps with logging """