parallel.xml 2.8 KB

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  1. <?xml version="1.0" ?>
  2. <diagram author="Glenn De Jonghe" name="TestParallel">
  3. <description>
  4. Testing parallelism.
  5. </description>
  6. <inport name="test_input" />
  7. <outport name="test_output" />
  8. <class name="Class1" default="true">
  9. <scxml>
  10. <parallel id="parallel_1">
  11. <state id="orthogonal_1" initial="state_1">
  12. <state id="state_1">
  13. <onentry>
  14. <raise port="test_output" event="in_state_1" />
  15. </onentry>
  16. <transition port="test_input" event="to_state_2" target="../state_2"/>
  17. </state>
  18. <state id="state_2">
  19. <onentry>
  20. <raise port="test_output" event="in_state_2" />
  21. </onentry>
  22. <transition port="test_input" event="to_state_1" target="../state_1"/>
  23. </state>
  24. </state>
  25. <state id="orthogonal_2" initial="state_3">
  26. <state id="state_3">
  27. <onentry>
  28. <raise port="test_output" event="in_state_3" />
  29. </onentry>
  30. <transition port="test_input" event="to_state_4" target="../state_4"/>
  31. </state>
  32. <state id="state_4">
  33. <onentry>
  34. <raise port="test_output" event="in_state_4" />
  35. </onentry>
  36. <transition port="test_input" event="to_state_3" target="../state_3"/>
  37. </state>
  38. </state>
  39. </parallel>
  40. </scxml>
  41. </class>
  42. <test>
  43. <input>
  44. <event name="to_state_2" port="test_input" time="0.0"/>
  45. <event name="to_state_4" port="test_input" time="0.0"/>
  46. <event name="to_state_1" port="test_input" time="0.0"/>
  47. <event name="to_state_2" port="test_input" time="0.0"/>
  48. <event name="to_state_3" port="test_input" time="0.0"/>
  49. </input>
  50. <expected>
  51. <slot>
  52. <event name="in_state_1" port="test_output"/>
  53. <event name="in_state_3" port="test_output"/>
  54. </slot>
  55. <slot>
  56. <event name="in_state_2" port="test_output"/>
  57. </slot>
  58. <slot>
  59. <event name="in_state_4" port="test_output"/>
  60. </slot>
  61. <slot>
  62. <event name="in_state_1" port="test_output"/>
  63. </slot>
  64. <slot>
  65. <event name="in_state_2" port="test_output"/>
  66. </slot>
  67. <slot>
  68. <event name="in_state_3" port="test_output"/>
  69. </slot>
  70. </expected>
  71. </test>
  72. </diagram>