Browse Source

Add the necessary inter-formalism links in the model to RAMify and add
test for control_to_EPN

Yentl Van Tendeloo 8 years ago
parent
commit
19ae264952
2 changed files with 56 additions and 16 deletions
  1. 40 0
      integration/test_powerwindow.py
  2. 16 16
      models/control_to_EPN.mvc

+ 40 - 0
integration/test_powerwindow.py

@@ -91,6 +91,22 @@ class TestPowerWindow(unittest.TestCase):
                 "Query",
                 "Query",
                 "",
                 "",
                 "All_RAM",
                 "All_RAM",
+                "model_modify",
+                    "__merged_All_RAM",
+                        "instantiate",
+                            "Association",
+                            "C2P_PlaceLink",
+                            "PW_Control/State",
+                            "Encapsulated_PetriNet/Place",
+                        "instantiate",
+                            "Association",
+                            "C2P_TransitionLink",
+                            "PW_Control/Transition",
+                            "Encapsulated_PetriNet/Transition",
+                        "exit",
+                "transformation_RAMify",
+                    "__merged_All_RAM",
+                    "All_RAM",
                 "transformation_add_MANUAL",
                 "transformation_add_MANUAL",
                     "",
                     "",
                     "Requirements",
                     "Requirements",
@@ -195,6 +211,29 @@ class TestPowerWindow(unittest.TestCase):
                 "Formalisms to include (terminate with empty string)?",
                 "Formalisms to include (terminate with empty string)?",
                 "Name of the RAMified transformation metamodel?",
                 "Name of the RAMified transformation metamodel?",
                 "Ready for command...",
                 "Ready for command...",
+                # model_modify
+                "Which model do you want to modify?",
+                "Model loaded, ready for commands!",
+                "Use 'help' command for a list of possible commands",
+                "Please give your command.",
+                # instantiate 1
+                "Type to instantiate?",
+                "Name of new element?",
+                "Source name?",
+                "Destination name?",
+                "Instantiation successful!",
+                "Please give your command.",
+                # instantiate 2
+                "Type to instantiate?",
+                "Name of new element?",
+                "Source name?",
+                "Destination name?",
+                "Instantiation successful!",
+                "Please give your command.",
+                # transformation_RAMify
+                "Which metamodel do you want to RAMify?",
+                "Where do you want to store the RAMified metamodel?",
+                "Ready for command...",
                 # transformation_add_MANUAL
                 # transformation_add_MANUAL
                 ] + [
                 ] + [
                     "Which metamodels do you want to use as source for the manual operation (empty string to finish)?",
                     "Which metamodels do you want to use as source for the manual operation (empty string to finish)?",
@@ -303,6 +342,7 @@ class TestPowerWindow(unittest.TestCase):
                      "  make_initial_models : All_RAM",
                      "  make_initial_models : All_RAM",
                      "  pm_powerwindow : ProcessModel",
                      "  pm_powerwindow : ProcessModel",
                      "  environment_to_EPN : ActionLanguage",
                      "  environment_to_EPN : ActionLanguage",
+                     "  control_to_EPN : All_RAM",
                      "  ReachabilityGraph : SimpleClassDiagrams",
                      "  ReachabilityGraph : SimpleClassDiagrams",
                      ]),
                      ]),
                 "Ready for command...",
                 "Ready for command...",

+ 16 - 16
models/control_to_EPN.mvc

@@ -7,12 +7,12 @@ All_RAM Control2EPN {
         {Contains} Success success {}
         {Contains} Success success {}
         {Contains} ForAll copy_events {
         {Contains} ForAll copy_events {
             LHS {
             LHS {
-                Pre_Control_PW/Transition {
+                Pre_PW_Control/Transition {
                     label = "0"
                     label = "0"
                 }
                 }
             }
             }
             RHS {
             RHS {
-                Post_Control_PW/Transition ct1 {
+                Post_PW_Control/Transition ct1 {
                     label = "0"
                     label = "0"
                 }
                 }
                 Post_Encapsulated_PetriNet/Transition ct2 {
                 Post_Encapsulated_PetriNet/Transition ct2 {
@@ -29,12 +29,12 @@ All_RAM Control2EPN {
         }
         }
         {Contains} ForAll copy_states {
         {Contains} ForAll copy_states {
             LHS {
             LHS {
-                Pre_Control_PW/State {
+                Pre_PW_Control/State {
                     label = "0"
                     label = "0"
                 }
                 }
             }
             }
             RHS {
             RHS {
-                Post_Control_PW/State cp1 {
+                Post_PW_Control/State cp1 {
                     label = "0"
                     label = "0"
                 }
                 }
                 Post_Encapsulated_PetriNet/Place cp2 {
                 Post_Encapsulated_PetriNet/Place cp2 {
@@ -58,13 +58,13 @@ All_RAM Control2EPN {
         }
         }
         {Contains} ForAll copy_P2T {
         {Contains} ForAll copy_P2T {
             LHS {
             LHS {
-                Pre_Control_PW/State cp2t_p{
+                Pre_PW_Control/State cp2t_p{
                     label = "0"
                     label = "0"
                 }
                 }
-                Pre_Control_PW/Transition cp2t_t{
+                Pre_PW_Control/Transition cp2t_t{
                     label = "1"
                     label = "1"
                 }
                 }
-                Pre_Control_PW/From (cp2t_p, cp2t_t){
+                Pre_PW_Control/From (cp2t_p, cp2t_t){
                     label = "2"
                     label = "2"
                 }
                 }
                 Pre_Encapsulated_PetriNet/Place cp2t_p2{
                 Pre_Encapsulated_PetriNet/Place cp2t_p2{
@@ -81,13 +81,13 @@ All_RAM Control2EPN {
                 }
                 }
             }
             }
             RHS {
             RHS {
-                Post_Control_PW/State rhs_cp2t_p{
+                Post_PW_Control/State rhs_cp2t_p{
                     label = "0"
                     label = "0"
                 }
                 }
-                Post_Control_PW/Transition rhs_cp2t_t{
+                Post_PW_Control/Transition rhs_cp2t_t{
                     label = "1"
                     label = "1"
                 }
                 }
-                Post_Control_PW/P2T rhs_cp2t_p2t (rhs_cp2t_p, rhs_cp2t_t){
+                Post_PW_Control/P2T rhs_cp2t_p2t (rhs_cp2t_p, rhs_cp2t_t){
                     label = "2"
                     label = "2"
                 }
                 }
                 Post_Encapsulated_PetriNet/Place rhs_cp2t_p2 {
                 Post_Encapsulated_PetriNet/Place rhs_cp2t_p2 {
@@ -109,13 +109,13 @@ All_RAM Control2EPN {
         }
         }
         {Contains} ForAll copy_T2P {
         {Contains} ForAll copy_T2P {
             LHS {
             LHS {
-                Pre_Control_PW/State ct2p_p{
+                Pre_PW_Control/State ct2p_p{
                     label = "0"
                     label = "0"
                 }
                 }
-                Pre_Control_PW/Transition ct2p_t{
+                Pre_PW_Control/Transition ct2p_t{
                     label = "1"
                     label = "1"
                 }
                 }
-                Pre_Control_PW/T2P (ct2p_t, ct2p_p){
+                Pre_PW_Control/T2P (ct2p_t, ct2p_p){
                     label = "2"
                     label = "2"
                 }
                 }
                 Pre_Encapsulated_PetriNet/Place ct2p_p2{
                 Pre_Encapsulated_PetriNet/Place ct2p_p2{
@@ -132,13 +132,13 @@ All_RAM Control2EPN {
                 }
                 }
             }
             }
             RHS {
             RHS {
-                Post_Control_PW/Place rhs_ct2p_p{
+                Post_PW_Control/Place rhs_ct2p_p{
                     label = "0"
                     label = "0"
                 }
                 }
-                Post_Control_PW/Transition rhs_ct2p_t{
+                Post_PW_Control/Transition rhs_ct2p_t{
                     label = "1"
                     label = "1"
                 }
                 }
-                Post_Control_PW/T2P (rhs_ct2p_t, rhs_ct2p_p){
+                Post_PW_Control/T2P (rhs_ct2p_t, rhs_ct2p_p){
                     label = "2"
                     label = "2"
                 }
                 }
                 Post_Encapsulated_PetriNet/Place rhs_ct2p_p2 {
                 Post_Encapsulated_PetriNet/Place rhs_ct2p_p2 {