Browse Source

added parallel devs formalism

Simon Van Mierlo 8 years ago
parent
commit
37c8ac0e7e

+ 6 - 0
interface/PDEVS/.code.alc

@@ -0,0 +1,6 @@
+include "primitives.alh"
+Element function intTransition():
+	Element retValue
+	retValue = create_node()
+	dict_add_fast(retValue, "g_out", 0.3)
+	return retValue!

+ 94 - 0
interface/PDEVS/.model.mvc

@@ -0,0 +1,94 @@
+include "primitives.alh"
+AtomicDEVSBlock Generator {
+	initialState = "generating"
+	name = "Generator"
+	intTransition = $
+		Element function intTransition():
+			Element retValue
+			retValue = create_node()
+			dict_add_fast(retValue, "g_out", 0.3)
+			return retValue!
+	$
+}
+AtomicDEVSBlock Processor {
+	initialState = "idle"
+	name = "Processor"
+}
+AtomicDEVSBlock Collector {
+	initialState = "waiting"
+	name = "Collector"
+}
+OutputPort g_out {name = "g_out"}
+InputPort p_in {name = "p_in"}
+OutputPort p_out {name = "p_out"}
+InputPort c_in {name = "c_in"}
+DEVSBlockToPort(Generator, g_out) {}
+DEVSBlockToPort(Processor, p_in) {}
+DEVSBlockToPort(Processor, p_out) {}
+DEVSBlockToPort(Collector, c_in) {}
+CoupledDEVSBlock CoupledProcessor {
+	name = "CoupledProcessor"
+}
+InputPort cp_in {name = "cp_in"}
+OutputPort cp_out {name = "cp_out"}
+DEVSBlockToPort (CoupledProcessor, cp_in) {}
+DEVSBlockToPort (CoupledProcessor, cp_out) {}
+DEVSInstance p1 {
+	name = "p1"
+	type = "Processor"
+}
+DEVSInstance p2 {
+	name = "p2"
+	type = "Processor"
+}
+SubModel (CoupledProcessor, p1) {}
+SubModel (CoupledProcessor, p2) {}
+InputPort p1_in {name = "p_in"}
+OutputPort p1_out {name = "p_out"}
+InputPort p2_in {name = "p_in"}
+OutputPort p2_out {name = "p_out"}
+DEVSInstanceToPort (p1, p1_in) {}
+DEVSInstanceToPort (p1, p1_out) {}
+DEVSInstanceToPort (p2, p2_in) {}
+DEVSInstanceToPort (p2, p2_out) {}
+Channel (cp_in, p1_in) {}
+Channel (p1_out, p2_in) {}
+Channel (p2_out, cp_out) {}
+CoupledDEVSBlock Root {
+	name = "Root"
+}
+DEVSInstance generator {
+	name = "generator"
+	type = "Generator"
+}
+DEVSInstance coupledprocessor {
+	name = "coupledprocessor"
+	type = "CoupledProcessor"
+}
+DEVSInstance processor {
+	name = "processor"
+	type = "Processor"
+}
+DEVSInstance collector {
+	name = "collector"
+	type = "Collector"
+}
+SubModel (Root, generator) {}
+SubModel (Root, coupledprocessor) {}
+SubModel (Root, processor) {}
+SubModel (Root, collector) {}
+OutputPort generator_out {name = "g_out"}
+InputPort coupledprocessor_in {name = "cp_in"}
+OutputPort coupledprocessor_out {name = "cp_out"}
+InputPort processor_in {name = "p_in"}
+OutputPort processor_out {name = "p_out"}
+InputPort collector_in {name = "c_in"}
+DEVSInstanceToPort (generator, generator_out) {}
+DEVSInstanceToPort (coupledprocessor, coupledprocessor_in) {}
+DEVSInstanceToPort (coupledprocessor, coupledprocessor_out) {}
+DEVSInstanceToPort (processor, processor_in) {}
+DEVSInstanceToPort (processor, processor_out) {}
+DEVSInstanceToPort (collector, collector_in) {}
+Channel (generator_out, coupledprocessor_in) {}
+Channel (coupledprocessor_out, processor_in) {}
+Channel (processor_out, collector_in) {}

+ 28 - 0
interface/PDEVS/console.py

@@ -0,0 +1,28 @@
+import sys
+from modelverse import *
+import random, re, json
+
+def print_mv_with_input(value):
+    print(value)
+    return raw_input()
+
+def print_mv(value):
+    print(value)
+
+print("Init")
+init()
+print("Login")
+login("admin", "admin")
+
+# Add the metamodel for Parallel DEVS
+print("Add metamodels")
+try:
+    model_add("formalisms/ParallelDEVS", "formalisms/SimpleClassDiagrams", open("../../models/paralleldevs_design.mvc").read())
+except ModelExists:
+    pass
+
+print("Add model")
+try:
+    model_add("produce_consume_devs", "formalisms/ParallelDEVS", open("../../models/produce_consume_pdevs.mvc").read())
+except ModelExists:
+    pass

File diff suppressed because it is too large
+ 1001 - 0
interface/PDEVS/modelverse.py


+ 28 - 0
models/celldevs_design.mvc

@@ -0,0 +1,28 @@
+ComplexAttribute ActionCode {}
+SimpleAttribute String {}
+SimpleAttribute Natural {}
+SimpleAttribute Integer {}
+SimpleAttribute Boolean {}
+
+Class Component {
+    width: Natural
+    height: Natural
+    wrappedBorder: Boolean
+    initialCellValue: Integer
+}
+
+Class NeighborDefinition {
+    x: Integer
+    y: Integer
+}
+
+Association ComponentNeigbor(Component, NeighborDefinition) {}
+
+Class SpecificCellValue {
+    value: Integer
+}
+
+Association ComponentSpecificValue(Component, SpecificCellValue) {
+    x: Natural
+    y: Natural
+}

+ 35 - 0
models/paralleldevs_design.mvc

@@ -0,0 +1,35 @@
+ComplexAttribute ActionCode {}
+SimpleAttribute String {}
+
+Class BaseDEVSBlock {
+    name: String    
+}
+
+Class AtomicDEVSBlock: BaseDEVSBlock {
+    timeAdvance: ActionCode
+    outputFunc: ActionCode
+    intTransition: ActionCode
+    extTransition: ActionCode
+    confTransition: ActionCode
+    initialState: String
+}
+
+Class CoupledDEVSBlock: BaseDEVSBlock {}
+
+Class DEVSInstance {
+    name: String
+    type: String
+}
+
+Association SubModel(CoupledDEVSBlock, DEVSInstance) {}
+
+Class Port {
+    name: String
+}
+
+Class InputPort: Port {}
+Class OutputPort: Port {}
+
+Association DEVSBlockToPort(BaseDEVSBlock, Port) {}
+Association DEVSInstanceToPort(DEVSInstance, Port) {}
+Association Channel (Port, Port) {}

+ 118 - 0
models/produce_consume_PDEVS.mvc

@@ -0,0 +1,118 @@
+include "primitives.alh"
+
+AtomicDEVSBlock Generator {
+    initialState = "generating"
+    name = "Generator"
+    
+    intTransition = $
+        Element function intTransition():
+            Element retValue
+            retValue = create_node()
+            dict_add_fast(retValue, "g_out", 0.3)
+            return retValue!
+    $
+}
+
+AtomicDEVSBlock Processor {
+    initialState = "idle"
+    name = "Processor"
+}
+
+AtomicDEVSBlock Collector {
+    initialState = "waiting"
+    name = "Collector"
+}
+
+OutputPort g_out {name = "g_out"}
+InputPort p_in {name = "p_in"}
+OutputPort p_out {name = "p_out"}
+InputPort c_in {name = "c_in"}
+
+DEVSBlockToPort(Generator, g_out) {}
+DEVSBlockToPort(Processor, p_in) {}
+DEVSBlockToPort(Processor, p_out) {}
+DEVSBlockToPort(Collector, c_in) {}
+
+CoupledDEVSBlock CoupledProcessor {
+    name = "CoupledProcessor"
+}
+
+InputPort cp_in {name = "cp_in"}
+OutputPort cp_out {name = "cp_out"}
+
+DEVSBlockToPort (CoupledProcessor, cp_in) {}
+DEVSBlockToPort (CoupledProcessor, cp_out) {}
+
+DEVSInstance p1 {
+    name = "p1"
+    type = "Processor"
+}
+
+DEVSInstance p2 {
+    name = "p2"
+    type = "Processor"
+}
+
+SubModel (CoupledProcessor, p1) {}
+SubModel (CoupledProcessor, p2) {}
+
+InputPort p1_in {name = "p_in"}
+OutputPort p1_out {name = "p_out"}
+InputPort p2_in {name = "p_in"}
+OutputPort p2_out {name = "p_out"}
+
+DEVSInstanceToPort (p1, p1_in) {}
+DEVSInstanceToPort (p1, p1_out) {}
+DEVSInstanceToPort (p2, p2_in) {}
+DEVSInstanceToPort (p2, p2_out) {}
+
+Channel (cp_in, p1_in) {}
+Channel (p1_out, p2_in) {}
+Channel (p2_out, cp_out) {}
+
+CoupledDEVSBlock Root {
+    name = "Root"
+}
+
+DEVSInstance generator {
+    name = "generator"
+    type = "Generator"
+}
+
+DEVSInstance coupledprocessor {
+    name = "coupledprocessor"
+    type = "CoupledProcessor"
+}
+
+DEVSInstance processor {
+    name = "processor"
+    type = "Processor"
+}
+
+DEVSInstance collector {
+    name = "collector"
+    type = "Collector"
+}
+
+SubModel (Root, generator) {}
+SubModel (Root, coupledprocessor) {}
+SubModel (Root, processor) {}
+SubModel (Root, collector) {}
+
+OutputPort generator_out {name = "g_out"}
+InputPort coupledprocessor_in {name = "cp_in"}
+OutputPort coupledprocessor_out {name = "cp_out"}
+InputPort processor_in {name = "p_in"}
+OutputPort processor_out {name = "p_out"}
+InputPort collector_in {name = "c_in"}
+
+DEVSInstanceToPort (generator, generator_out) {}
+DEVSInstanceToPort (coupledprocessor, coupledprocessor_in) {}
+DEVSInstanceToPort (coupledprocessor, coupledprocessor_out) {}
+DEVSInstanceToPort (processor, processor_in) {}
+DEVSInstanceToPort (processor, processor_out) {}
+DEVSInstanceToPort (collector, collector_in) {}
+
+Channel (generator_out, coupledprocessor_in) {}
+Channel (coupledprocessor_out, processor_in) {}
+Channel (processor_out, collector_in) {}

+ 5 - 0
models/reachability.alc

@@ -244,6 +244,11 @@ Boolean function reachability_graph(model : Element):
                         enabled_transitions_set = enabled_transitions[state_id]
                         transition = set_pop(enabled_transitions_set)
                         
+                        if (mode == 'continuous'):
+                            output('{"msg_type": "enabled_commands", "commands": []}')
+                        if (mode == "step"):
+                            output('{"msg_type": "enabled_commands", "commands": ["step", "continuous", "manual"]}')
+                        
                         break!
                 elif (user_input_s == 'selected_marking'):
                     user_input_i = cast_s2i(input())